Ehud Nir — Engineering Leadership in Advanced Connectivity ICs

From DSP architecture to production-ready SoCs

Ehud Nir is a senior ASIC engineering leader focused on automotive networking, PHY SoCs, and high-speed DSP innovation. He is Sr. Director of ASIC Engineering and General Manager at Ethernovia Canada, where he leads a global team developing 10GBASE-T1 automotive Ethernet SoCs. His scope includes architecture, specifications, design execution, functional safety, and production readiness.

His career combines leadership with hands-on execution across Ethernovia, Cadence, Rambus/AnalogX, Huawei, IBM, and STMicroelectronics. He has led end-to-end ASIC development, covering DSP architecture, AFE integration, microarchitecture, RTL, verification, backend and STA, firmware, and lab validation. He has also built and scaled international R&D teams across North America, Israel, India, and China.

His work includes advanced-technology Ethernet, PCIe, and multi-protocol SERDES PHY ASIC and IP development, from architecture to production silicon. He has authored and co-authored papers and patents, including a DesignCon 2025 Best Paper Award. He also maintains a growing interest in emerging agentic design flows for more efficient ASIC design flows. He holds B.Sc. and M.Sc. degrees in Electrical and Electronics Engineering from Tel Aviv University.